Princeton Architecture Laboratory for Multimedia and Security
نویسندگان
چکیده
Microprocessor instruction set architectures currently offer support for operations on full processor words and, more recently, on subwords of 8, 16, 32 or 64 bits. However, there is little support for bit-oriented operations beyond the bitwise logical operators and shift operators. Some ISAs, such as PA-RISC and Itanium, offer more advanced instructions such as extract and deposit that combine mask and shift operations in one instruction.
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